AMD Working to Bring CXL Memory Tech to Future Consumer CPUs

AMD representatives made an unexpected reveal today on the company’s Meet the Experts webinar: AMD is working to bring CXL memory technology to its consumer CPUs over the next three to five years. This would bring persistent memory devices, like SSDs, onto the memory bus to improve performance. Compute eXpress Link (CXL) enables improved performance, lower latency, and memory expansion capabilities by bringing remote memory devices into the same pool with system DRAM. Think of it as enabling you to expand your memory by plugging in an SSD or more memory onto a device that slots into your PCIe or M.2 port.

Unlike Optane, which Intel is killing off due to poor adoption, CXL already enjoys broad industry support through an open protocol and can support many types of memories. In fact, AMD and Intel, among many others, are working together on the new specification.

The Meet the Experts show covered a diverse range of topics, including AMD’s AM5 platform, DDR5 memory, and PCIe 5.0 SSDs. The host then opened the floor to questions. In response to the question of why storage devices aren’t connected to the memory bus, AMD’s Senior Developer Manager Leah Schoeb explained that persistent memories (like SSDs) and memory currently communicate with different protocols, preventing communication. 

“[…]It’s not that in the future, we won’t be bridging that communication. That’s something that we’re looking at with technologies such as CXL. So you’ll find over the next, you know, three to five years, you’ll see it first in the server area, but you’ll find moving down into the client [consumer] area, ways that we can make sure that memory and storage can communicate on the same bus through CXL.”

The host asked Phison’s Senior Manager of Technical Marketing, Chris Ramseyer, if the company had any more to add to the topic.

“Well, to be honest, I’m on calls about this. Some of those are with Leah. I’m not sure how much I can really give out. We haven’t announced anything in this area. But I can say that there is progress being made. And, again, this will be another ecosystem-type project, where it’s not just going to be Phison and not just AMD putting this together. We’re all going to have to work together to do this, and these collaborations have really advanced PCs over the last few years[…],” he commented.

As a reminder, the CXL spec is an open industry standard that provides a cache coherent interconnect between CPUs and accelerators, like GPUs, smart I/O devices, DPUs, and various flavors of DDR4/DDR5 and persistent memories. The interconnect allows the CPU to work on the same memory regions as the connected devices, thus improving performance and power efficiency while reducing software complexity and data movement.

However, the protocol requires dedicated silicon in both the host CPU and the connected device to function, like memory, persistent memory, GPU, or other accelerators. That requires the feature to be baked into the chip, and as with any new technology, CXL will take some time to mature.

The first CXL-capable processors are right around the corner, though: Intel’s Sapphire Rapids and AMD’s EPYC Genoa will come with early revisions of the specification built around the PCIe 5.0 interface. New revisions of the CXL spec still under development will support PCIe 6.0 and more sophisticated capabilities, like memory sharing and pooling. AMD will reveal its EPYC Genoa server chips in a live stream on November 10, while Sapphire Rapids is expected to arrive early next year, so CXL technology is on the cusp of real-world use.

AMD’s disclosure today doesn’t give us a specific date or chip generation for CXL support in consumer CPUs, but the three-to-five-year window mentioned suggests we could see it well after PCIe 6.0 devices, which debut in the 2024 timeframe.

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