China’s CXMT reportedly aims to make HBM memory for AI chips — exotic memory for China’s chipmaking self-sufficiency

ChangXin Memory Technologies (CXMT), China’s leading domestic DRAM maker, plans to build high-bandwidth memory (HBM) used by AI and high-performance computing (HPC) processors, reports Nikkei. The company is currently procuring necessary equipment, so it isn’t going to roll out its HBM products for another year or two, but the effort to compete against established players in the top league emphasizes how badly China wants self-sufficiency in memory. 

According to Nikkei’s sources, CXMT has placed orders and obtained manufacturing and testing gear for HBM memory assembly and testing from suppliers in the U.S. and Japan. Notably, top U.S. equipment makers, such as Applied Materials and Lam Research, were granted export licenses by the U.S. authorities to export fab tools to the Chinese chip manufacturer in mid-2023, as reported by two Nikkei informants. 

HBM3 stacks eight or 12 memory devices with wide interfaces on top of each other, interconnects them using through silicon vias (TSVs), and then places them on a base logic die that uses a 1024-bit interface to connect to a host processor at an unmatched bandwidth. While the architecture seems simple enough in general, it is not by far, and making HBM is a complicated task. 

Production of HBM known good stack dies (KGSDs) is fundamentally different from making traditional memory devices as HBM makers have to produce memory devices and test them, produce a base die and test it, assemble the package, and connect all the ICs with TSVs, and then test the whole stack. It takes a lot of tools and expertise to produce HBM DRAM, but this type of memory beats everything on the market in terms of bandwidth and in terms of power efficiency. 

CXMT is already running one DRAM fab near Hefei, China, and is raising money to build the second one. The second Hefei plant is believed to adopt more sophisticated process technologies (albeit behind leading offerings from Micron, Samsung, and SK Hynix) and will likely also be used to build HBM DRAM devices and packages. Meanwhile, CXMT has yet to develop its own HBM production and packaging technologies. Furthermore, some of China’s chipmakers are still developing technologies to integrate HBM with logic chips (such as TSMC’s CoWoS). One of SMIC’s executives said a few years ago that the company would have to develop advanced packaging nodes, so it is likely that, by now, the company has gathered enough know-how in this direction. 

“When your DRAM technology already lags behind global rivals, that puts your HBM technology at a disadvantage to be competitive in a fully commercial market,” Brady Wang, a semiconductor analyst with Counterpoint, told Nikkei. “Not to mention that HBM production requires complex design and manufacturing expertise to materialize. […] It could be a steep climb.” 

One thing to note here is that while current HBM3 and HBM3E with a 1024-bit interface use interposers to connect to host processors, many industry experts indicate that HBM4 with its 2048-bit interface will need to be placed directly on host processors, which will further complicate production, but will bring performance and power efficiency further. It is unclear whether CXMT is developing HBM3, HBM3E, or HBM4E products. Still, we would expect the firm to start from HBM3/HBM3E, which will not enable it to challenge Micron, Samsung, and SK Hynix in the next few years, but it will likely be good enough to fulfill some of China’s domestic needs.  

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